Power Management IC Designer

Job Purpose

Navitas Semiconductor (Nasdaq: NVTS) is a next-generation power semiconductor leader driving innovation in gallium nitride (GaN) and high-voltage silicon carbide (SiC) technologies. Our products enable faster, more efficient power delivery across AI data centers, high-performance computing, energy and grid infrastructure, and industrial electrification.

With more than 30 years of combined expertise in wide bandgap technologies, GaNFast™ power ICs integrate GaN power, drive, control, sensing, and protection, delivering faster power delivery, higher system density, and greater efficiency. GeneSiC™ high-voltage SiC devices leverage patented trench-assisted planar technology to provide industry-leading voltage capability, efficiency, and reliability for medium-voltage grid and infrastructure applications.

We are looking for a motivated Power IC Design Engineer to join our Integrated Voltage Regulator (IVR) design team. The engineer will contribute to the design, simulation, verification, and characterization of high-performance power-management ICs and integrated voltage regulators.

This position is ideal for a recent graduate or early-career engineer with a strong foundation in analog circuits, semiconductor devices, and power electronics who is interested in developing expertise in high-frequency DC-DC converters, power stages, control circuits, and integrated power delivery. The engineer will work closely with lead IC designers, layout engineers, package engineers, systems engineers, and applications engineers throughout the full product development cycle, from architecture and circuit design through silicon validation.

Key Responsibilities and Duties

• Design and simulate analog and power-management circuits for integrated DC-DC converters and IVRs.
• Support development of synchronous buck converters, power stages, gate drivers, control loops, protection circuits, and supporting analog blocks.
• Analyze power MOSFET characteristics including RDS(on), gate charge, switching loss, conduction loss, COSS/QOSS, and device figure of merit.
• Perform schematic-level and post-layout simulations across PVT corners and Monte Carlo conditions.
• Evaluate converter performance including efficiency, transient response, stability, ripple, switching behavior, and power loss.
• Support selection and optimization of power devices in BCD/CMOS/GaN technologies.
• Support extraction and review of post-layout parasitic and evaluate their impact on circuit performance.
• Assist with silicon bring-up, bench characterization, debugging, and correlation between simulation and measurement.
• Document design calculations, simulation results, design reviews, and characterization results.
• Collaborate with package, systems, applications, and test teams to optimize overall IVR performance.

Knowledge Skills Abilities and Other Characteristics

• Deep knowledge of analog IC design, DC-DC converter architectures, feedback control, gate drivers, and power delivery tradeoffs.
• Ability to connect IC performance with packaging, thermal limits, manufacturing constraints, and customer system requirements.
• Ability to build and develop teams, delegate technical ownership, and prioritize resources across concurrent programs.
• Sound engineering judgment, clear customer and executive communication, and accountability for design quality, schedule, and team development.