Software Engineer Stf - E4

Standard Job Description

The Advanced Programs and Exploitation (APEX) team within Lockheed Martin Space is seeking a skilled software engineer to develop C++ simulations of space-based payload processing for OPIR data used in missile warning and defense programs.

In this role, you will develop high-performance software models of payload algorithms and processing pipelines, with a particular focus on translating algorithms implemented on FPGAs into functionally equivalent implementations running on x86 platforms. You will work closely with FPGA, algorithm, flight software, and systems engineers to validate processing, investigate discrepancies, and support mission processing integration and testing.

The selected candidate will be responsible for:

• Developing high-performance C++ simulation software for x86/Linux
• Translating FPGA-based algorithms into functionally equivalent C++ implementations
• Modeling payload processing, data flows, and algorithmic pipelines
• Comparing and validating CPU-based implementations against FPGA/reference implementations
• Supporting software-in-the-loop and hardware-in-the-loop testing
• Generating and analyzing mission and sensor data
• Troubleshooting differences between FPGA, simulated, and CPU implementations
• Optimizing C++ software for large datasets and computationally intensive processing
• Documenting algorithms, interfaces, assumptions, and test results

This position is located in our offices in beautiful Boulder, Colorado.

Basic Qualifications

• Degree in Computer Science, Computer Engineering, Electrical Engineering, Mathematics, Physics,

  or equivalent combination of education, training, and experience in a related technical field

• Strong C++ development experience
• Experience developing software for x86/Linux platforms
• Experience with algorithms, data structures, and object-oriented design
• Familiarity with FPGA architecture, pipelining, parallel processing, and data movement
• Ability to obtain a Secret government clearance

Desired Skills

• Experience translating algorithms between FPGA and x86/CPU implementations
• Experience with FPGA-based signal or image processing
• Familiarity with FPGA architecture, pipelining, parallel processing, and data movement
• Experience with Vitis, Vivado, or HLS
• Experience with fixed-point and floating-point processing
• Experience with image signal or mission data processing
• Experience with software-in-the-loop or hardware-in-the-loop simulation
• Experience with C++ performance optimization or multithreading
• Python experience for data analysis or test automation
• Active security clearance

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