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ASIC Design Verification Engineer
You will develop verification strategies, test plans, methodologies, and SystemVerilog UVM environments for AI inference ASICs. You will create simulations and tests, drive coverage closure and root-cause analysis,…
ASIC Design Engineer
You will define microarchitecture and deliver parameterized SystemVerilog RTL for complex IP blocks and subsystems. You will lead signoff activities, optimize PPA, integrate interfaces and memory technologies, improve…
Principal ASIC Architect AI Inference
You will explore accelerator architectures for evolving AI models, evaluate memory and communication designs, and develop analytical and simulation models for architectural tradeoffs. You will work across hardware and…
Lead AI Forward Deployed Engineer
You will embed with firmware, runtime, performance, and simulation groups to build practical agentic workflows for coding, debugging, triage, testing, and documentation. You will own shared agent tooling and skills,…